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<p>The configuration structure for DSI Controller This structure passes the hardware building information to the driver.  
 <a href="struct_x_dsi___config.html#details">More...</a></p>
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Data Fields</h2></td></tr>
<tr class="memitem:a44191a0472bbf62f4e39b87b7dcf0a1a"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#a44191a0472bbf62f4e39b87b7dcf0a1a">DeviceId</a></td></tr>
<tr class="memdesc:a44191a0472bbf62f4e39b87b7dcf0a1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device Id.  <a href="#a44191a0472bbf62f4e39b87b7dcf0a1a">More...</a><br /></td></tr>
<tr class="separator:a44191a0472bbf62f4e39b87b7dcf0a1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a4691daa5e5f6b7f829e99c2075f45dcb"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#a4691daa5e5f6b7f829e99c2075f45dcb">BaseAddr</a></td></tr>
<tr class="memdesc:a4691daa5e5f6b7f829e99c2075f45dcb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Base address of DSI Controller.  <a href="#a4691daa5e5f6b7f829e99c2075f45dcb">More...</a><br /></td></tr>
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<tr class="memitem:a944ae6c5d834214d92a4c986827258e0"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#a944ae6c5d834214d92a4c986827258e0">DsiLanes</a></td></tr>
<tr class="memdesc:a944ae6c5d834214d92a4c986827258e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSI supported lanes1, 2, 3, 4.  <a href="#a944ae6c5d834214d92a4c986827258e0">More...</a><br /></td></tr>
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<tr class="memitem:a1ff0e4c00bcac61234b590aef399eede"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#a1ff0e4c00bcac61234b590aef399eede">DataType</a></td></tr>
<tr class="memdesc:a1ff0e4c00bcac61234b590aef399eede"><td class="mdescLeft">&#160;</td><td class="mdescRight">RGB type.  <a href="#a1ff0e4c00bcac61234b590aef399eede">More...</a><br /></td></tr>
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<tr class="memitem:ac431b685184340caa5516f5db1caa438"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#ac431b685184340caa5516f5db1caa438">DsiByteFifo</a></td></tr>
<tr class="memdesc:ac431b685184340caa5516f5db1caa438"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384.  <a href="#ac431b685184340caa5516f5db1caa438">More...</a><br /></td></tr>
<tr class="separator:ac431b685184340caa5516f5db1caa438"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ad51a5b196569da3d237bd429bed7e8ce"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#ad51a5b196569da3d237bd429bed7e8ce">CrcGen</a></td></tr>
<tr class="memdesc:ad51a5b196569da3d237bd429bed7e8ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">CRC Generation enable status.  <a href="#ad51a5b196569da3d237bd429bed7e8ce">More...</a><br /></td></tr>
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<tr class="memitem:adc3ba7f0bd696e7f78ff0f2105d6b276"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_dsi___config.html#adc3ba7f0bd696e7f78ff0f2105d6b276">DsiPixel</a></td></tr>
<tr class="memdesc:adc3ba7f0bd696e7f78ff0f2105d6b276"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pixels per beat receive on input stream.  <a href="#adc3ba7f0bd696e7f78ff0f2105d6b276">More...</a><br /></td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>The configuration structure for DSI Controller This structure passes the hardware building information to the driver. </p>
</div><h2 class="groupheader">Field Documentation</h2>
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<h2 class="memtitle"><span class="permalink"><a href="#a4691daa5e5f6b7f829e99c2075f45dcb">&#9670;&nbsp;</a></span>BaseAddr</h2>

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<p>Base address of DSI Controller. </p>

<p class="reference">Referenced by <a class="el" href="group__dsi__v1__0.html#ga7ee417c05f7b0171f4b5ab732fd92054">XDsi_CfgInitialize()</a>.</p>

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<h2 class="memtitle"><span class="permalink"><a href="#ad51a5b196569da3d237bd429bed7e8ce">&#9670;&nbsp;</a></span>CrcGen</h2>

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<p>CRC Generation enable status. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a1ff0e4c00bcac61234b590aef399eede">&#9670;&nbsp;</a></span>DataType</h2>

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<p>RGB type. </p>

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<a id="a44191a0472bbf62f4e39b87b7dcf0a1a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a44191a0472bbf62f4e39b87b7dcf0a1a">&#9670;&nbsp;</a></span>DeviceId</h2>

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<p>Device Id. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ac431b685184340caa5516f5db1caa438">&#9670;&nbsp;</a></span>DsiByteFifo</h2>

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<p>DSI byte FIFO size 128, 256, 512, 1024, 2048, 4096, 8192, 16384. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a944ae6c5d834214d92a4c986827258e0">&#9670;&nbsp;</a></span>DsiLanes</h2>

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<p>DSI supported lanes1, 2, 3, 4. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#adc3ba7f0bd696e7f78ff0f2105d6b276">&#9670;&nbsp;</a></span>DsiPixel</h2>

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<p>Pixels per beat receive on input stream. </p>

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